1. Technical Field
Embodiments of the invention relate generally to the field of high speed input-output (I/O) transceivers. More particularly, embodiments of the invention relate to an apparatus, system, and method for receiving pulse width modulated (PWM) signals.
2. Background Art
Semiconductor devices, computers, and other digital systems continue to increase their operating data rate, including the communication of digital differential signals of increasingly high transition rates. The transition rate refers to the rate at which a digital signal transitions between states. Successive generations of digital devices are approaching high-speed input/output (I/O) communications data rates on the order of giga-transitions per second, and even tens of giga-transitions per second. One problem is that as the transition rate increases, signal integrity degrades. Consequently, there is an increasing need for high-speed I/O receivers capable of accommodating such high transition rates by accurately identifying differential signal transitions and differential signal states.
Moreover, as power dissipation becomes a standard performance benchmark for consumer electronics—for example, tablet PCs, smart phones, low power laptops or net-books, etc.—traditional high speed input-output (I/O) transceivers used in processors of consumer (or other) devices are not optimum for low power operation. Such traditional high speed I/O transceivers have many analog components which are not scalable to newer process technologies. Traditional high speed I/O transceivers are unable to meet the stringent low power specifications of Mobile Industry Processor Interface (MIPI®) as described in the MIPI® Alliance Specification for M-PHYSM Version 1.00.00 of Feb. 8, 2011 and approved on Apr. 28, 2011.